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?2005 fairchild semiconductor corporation www.fairchildsemi.com rev.1.0.0 features ? optimized for quasi-resonant converter (qrc) ? advanced burst-mode operation for under 1 w standby power consumption ? pulse by pulse current limit (11.5a) ? over load protection (olp) - auto restart ? over voltage protection (ovp) - auto restart ? abnormal over current protection (aocp) - latch ? internal thermal shutdown (tsd) - latch ? under voltage lock out (uvlo) with hysteresis ? low startup current (typical : 25ua) ? low operating current (typical : 7ma) ? internal high voltage sensefet ? built-in soft start (20ms) ? extended quasi-resonant switching for wide load range application ?ctv ? dvd receiver ? audio power supply description in general, quasi-resonant converter (qrc) shows lower emi and higher power conversion efficiency compared to the conventional hard switched converter with a fixed switching frequency. therefore, it is well suited for applications that are sensitive to the noise, such as color tv and audio. the FSCQ1565RP is an integrated pulse width modulation (pwm) controller and sense fet specifically designed for quasi-resonant off-line switch mode power supplies (smps) with minimal external components. the pwm controller includes integrated fixed frequency oscillator, under voltage lockout, leading edge blanking (leb), optimized gate driver, internal soft start, temperature compensated precise current sources for a loop compensation and self protection circuitry. compared with discrete mosfet and pwm controller solution, it can reduce total cost, component count, size and weight simultaneously increasing efficiency, produc- tivity, and system reliability. this device is a basic platform well suited for cost effective designs of quasi resonant switching flyback converters. table 1. notes: 1. maximum practical continuous power in an open frame design at 50 c ambient. 2. 230 vac or 100/115 vac with doubler. typical circuit figure 1. typical flyback application output power table product 230vac 15% (2) 85-265vac open frame (1) open frame (1) fscq0765rt 100 w 85 w fscq1265rt 170 w 140 w fscq1565rt 210 w 170 w FSCQ1565RP 250 w 210 w vcc gnd drain sync vo pwm v fb ac in FSCQ1565RP FSCQ1565RP green mode fairchild power switch (fps tm ) for quasi-resonant switching converter
FSCQ1565RP 2 internal block diagram figure 2. functional block diagram of FSCQ1565RP 9v/15v 3 1 2 4 auxiliary vref main bias s q q r osc vcc vref i delay i fb v sd tsd vovp sync vocp s q q r r 2.5r vcc good vcc drain fb gnd aocp gate driver vcc good leb 600ns pwm soft start internal bias normal operation v burst vref i b vref i bfb burst mode controller normal operation burst switching 5 sync threshold quasi-resonant (qr) switching controller + - + - s q q r power off reset 4.6v/2.6v : normal qr 3.0v/1.8v : extended qr fs
FSCQ1565RP 3 pin definitions pin configuration figure 3. pin configuration (top view) pin number pin name pin function description 1 drain high voltage power sensefet drain connection. 2 gnd this pin is the control ground and the sensefet source. 3vcc this pin is the positive supply input. this pin provides internal operating current for both start-up and steady-state operation. 4vfb this pin is internally connected to the inverting input of the pwm comparator. the collector of an opto-coupler is typically tied to this pin. for stable operation, a capacitor should be placed between this pin and gnd. if the voltage of this pin reaches 7.5v, the over load protection triggers resulting in shutdown of the fps. 5sync this pin is internally connected to the sync detect comparator for quasi resonant switching. in normal quasi-resonant operation, the threshold of the sync comparator is 4.6v/2.6v. meanwhile, the sync threshold is changed to 3.0v/1.8v in extended quasi-resonant operation. to-3pf-7l 5.sync 4.vfb 3.vcc 2.gnd 1.drain
FSCQ1565RP 4 absolute maximum ratings (ta=25 c, unless otherwise specified) notes: 1. t j = 25 c to 150 c 2. repetitive rating: pulse width limited by maximum junction temperature 3. l = 21mh, v dd = 50v, r g = 25 ? , starting t j = 25 c parameter symbol value unit drain-source (gnd) voltage (1) v dss 650 v drain-gate voltage (r gs =1m ? )v dgr 650 v gate-source (gnd) voltage v gs 30 v drain current pulsed (2) i dm 45 a dc single pulsed avalanche energy (3) e as 1050 mj continuous drain current (tc = 25c) i d 8.3 a dc continuous drain current (t c =100 c) i d 5.5 a dc supply voltage v cc 20 v analog input voltage range v sync -0.3 to 13v v v fb -0.3 to v cc v total power dissipation p d 98 w operating junction temperature t j +150 c operating ambient temperature t a -25 to +85 c storage temperature range t stg -55 to +150 c thermal resistance rthjc 1.28 c/w esd capability, hbm model (all pins excepts for vfb) - 2.0 (vfb=1.7kv) kv esd capability, machine model (all pins excepts for vfb) - 300 (vfb=170v) v
FSCQ1565RP 5 electrical characteristics (sensefet part) (ta=25 c unless otherwise specified) note: 1. pulse test : pulse width 300 s, duty 2% parameter symbol condition min. typ. max. unit drain-source breakdown voltage bv dss v gs = 0v, i d = 250 a 650 - - v zero gate voltage drain current i dss v ds = max, rating, v gs = 0v - - 200 a v ds = 0.8*max., rating v gs = 0v, t c = 85 c - - 300 a static drain-source on resistance (note) r ds(on) v gs = 10v, i d = 2.3a - 0.53 0.7 ? input capacitance ciss v gs = 0v, v ds = 25v, f = 1mhz - 3050 3965 pf output capacitance coss - 220 286 reverse transfer capacitance crss - 40 52 turn on delay time td(on) v dd = 0.5bv dss , i d = 7.0a (mosfet switching times are essentially independent of operating temperature) -5075 ns rise time tr - 130 179 turn off delay time td (off) - 430 569 fall time tf - 135 186 total gate charge (gate-source+gate-drain) qg v gs = 10v, i d = 7.0a, v ds = 0.5bv dss (mosfet switching times are essentially independent of operating temperature) - 127 165 nc gate-source charge qgs - 16 21 gate-drain (miller) charge qgd - 52 68
FSCQ1565RP 6 electrical characteristics (continued) (ta=25 c unless otherwise specified) note: 1. these parameters is the current flowing in the control ic. 2. these parameters, although guaranteed, are tested only in eds (wafer test) process. 3. these parameters indicate inductor current. 4. these parameters, although guaranteed at the design, are not tested in mass production. parameter symbol condition min. typ. max. unit uvlo section vcc start threshold voltage v start v fb = gnd 141516 v vcc stop threshold voltage v stop v fb = gnd 8 9 10 v sensefet section drain to pkg breakdown voltage (note4) bvpkg 60hz ac, ta = 25c 3500 - - v drain to source breakdown voltage bvdss ta = 25c 650 - - v drain to source leakage current idss vdrain = 400v, ta = 25c - - 200 ua oscillator section initial frequency f osc - 182022khz voltage stability f stable 12v vcc 23v 0 1 3 % temperature stability (note2) ? f osc -25 c ta 85 c0 510 % maximum duty cycle d max - 929598% minimum duty cycle d min ---0% feedback section feedback source current i fb v fb = 0.8v 0.5 0.65 0.8 ma shutdown feedback voltage v sd vfb 6.9v 7.0 7.5 8.0 v shutdown delay current i delay v fb = 5v 456 a protection section over voltage protection v ovp vsync 11v 11 12 13 v over current latch voltage (note2) v ocl - 0.9 1.0 1.1 v thermal shutdown temp (note4) t sd - 140 - c
FSCQ1565RP 7 electrical characteristics (continued) (ta=25 c unless otherwise specified) note: 1. these parameters is the current flowing in the control ic. 2. these parameters, although guaranteed, are tested only in eds (wafer test) process. 3. these parameters indicate inductor current. 4. these parameters, although guaranteed at the design, are not tested in mass production. parameter symbol condition min. typ. max. unit sync section sync threshold in normal qr (h) v sh1 vcc = 16v, vfb = 5v 4.2 4.6 5.0 v sync threshold in normal qr (l) v sl1 vcc = 16v, vfb = 5v 2.3 2.6 2.9 v sync threshold in extended qr (h) v sh2 vcc = 16v, vfb = 5v 2.7 3.0 3.3 v sync threshold in extended qr (l) v sl2 vcc = 16v, vfb = 5v 1.6 1.8 2.0 v extended qr enable frequency f syh -90-khz extended qr disable frequency f syl -45-khz burst mode section burst mode enable feedback voltage v ben 0.25 0.40 0.55 v burst mode feedback source current i bfb 60 100 140 ua burst mode switching time t bs v fb = 0v 1.2 1.4 1.6 ms burst mode hold time t bh v fb = 0v 1.2 1.4 1.6 ms softstart section soft start time (note2) t ss 18 20 22 ms current limit(self-protection)section peak current limit (note3) i lim - 10.12 11.5 12.88 a burst mode peak current limit (note4) i bpk - 0.6 1.0 1.4 a total device section startup current i start v cc = v start -0.1v - 25 50 ua sustain latch current i sl v cc = v stop -0.1v - 50 100 ua operating supply current (note1) - in normal operation - in burst mode (without switching) i op vfb = 2v, v cc = 18v - 7 9 ma i ob vfb = gnd, v cc = 18v - 0.25 0.50 ma
FSCQ1565RP 8 comparison between ka5q1565rf and FSCQ1565RP function ka5q1565rf FSCQ1565RP FSCQ1565RP advantages startup current max. 200ua max. 50ua lower standby power consumption operating supply current typ. 10ma typ. 7ma operating current is reduced in burst operation to minimize standby power consumption - normal operation : 7ma - burst mode with switching : 7ma - burst mode without switching : 0.25ma switching in burst mode quasi-resonant switching fixed frequency switching (20khz) output regulation in standby mode vcc control with hysteresis output voltage feedback control easy to determine the output voltage in the standby mode output voltage drop in burst mode about half any level lower power consumption in the standby mode through larger output voltage drop primary side regulation available n/a soft start n/a available internal soft-start (20ms) extended quasi- resonant switching n/a available - guarantees wide load range - improved efficiency at high line input package type to-3pf-5l to-3pf-7l
FSCQ1565RP 9 electrical characteristics -50 0 50 100 150 0.8 1.0 1.2 temp[ ] operating supply current normalized to 25 -50 0 50 100 150 0.6 0.8 1.0 1.2 1.4 temp[ ] burst-mode supply current( non-switching) normalized to 25 -50 0 50 100 150 0.6 0.8 1.0 1.2 1.4 temp[ ] start-up current normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] start threshold voltage normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] stop threshold voltage normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 initial frequency normalized to 25 temp[ ]
FSCQ1565RP 10 electrical characteristics (continued) -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 maximum duty cycle normalized to 25 temp[ ] -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] over voltage protection normalized to 25 -50 0 50 100 150 0.8 0.9 1.0 1.1 1.2 temp[ ] shutdown delay current normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] shutdown feedback voltage normalized to 25 -50 0 50 100 150 0.8 0.9 1.0 1.1 1.2 temp[ ] feedback source current normalized to 25 -50 0 50 100 150 0.8 0.9 1.0 1.1 1.2 temp[ ] burst_mode feedback source current normalized to 25
FSCQ1565RP 11 electrical characteristics (continued) -50 0 50 100 150 0.6 0.8 1.0 1.2 1.4 temp[ ] burst_mode enable feedback voltage normalized to 25 -50 0 50 100 150 0.6 0.8 1.0 1.2 1.4 normalized to 25 temp[ ] feedback offset voltage -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] sync. threshold in normal qr(h) normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] sync. threshold in normal qr(l) normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] sync. threshold in extended qr(h) normalized to 25 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 temp[ ] sync. threshold in extended qr(l) normalized to 25
FSCQ1565RP 12 electrical characteristics (continued) -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 extended qr enable freqency normalized to 25 temp[ ] [ ] [ ] [ ] [ ] -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 normalized to 25 temp[ ] pulse-by-pulse current limit -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 normalized to 25 temp[ ] extended qr disable frequency 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 10 -2 10 -1 10 0 ? notes : 1. z ?jc (t) = 0.46 ? /w max. 2. duty factor, d=t 1 /t 2 3. t jm - t c = p dm * z ?jc (t) single pulse d=0.5 0.02 0.2 0.05 0.1 0.01 transieus thermal response z ?jc (t), thermal response t 1 , square wave pulse duration [sec] 10 0 10 1 10 2 10 3 10 -2 10 -1 10 0 10 1 10 2 maximum safe operating aree 100 us dc 10 ms 1 ms operation in this area is limited by r ds(on) ? notes : 1. t c = 25 o c 2. t j = 150 o c 3. single pulse i d , drain current [a] v ds , drain-source voltage [v] 25 50 75 100 125 150 0 200 400 600 800 1000 1200 maximum avalanch energy avalanche energy, e as [mj] initial junction temperature, t j [ o c]
FSCQ1565RP 13 functional description 1 . 1 . 1 . 1 . startup : figure 4 shows the typical startup circuit and transformer auxiliary winding for FSCQ1565RP application. before FSCQ1565RP begins switching, FSCQ1565RP consumes only startup current (typically 25ua) and the current supplied from the ac line charges the external capacitor (c a1 ) that is connected to the vcc pin. when vcc reaches start voltage of 15v (v start ), FSCQ1565RP begins switching, and the current consumed by FSCQ1565RP increases to 4ma. then, FSCQ1565RP continues its normal switching operation and the power required for this device is supplied from the transformer auxiliary winding, unless vcc drops below the stop voltage of 9v (v stop ). to guarantee the stable operation of the control ic, vcc has under voltage lockout (uvlo) with 6v hysteresis. figure 5 shows the relation between the FSCQ1565RP operating supply current and the supply voltage (vcc). figure 1. startup circuit figure 2. relation between operating supply current and vcc voltage the minimum average of the current supplied from the ac is given by where v ac min is the minimum input voltage, v start is the FSCQ1565RP start voltage (15v) and r str is the startup resistor. the startup resistor should be chosen so that i sup avg is larger than the maximum startup current (50ua). once the resistor value is determined, the maximum loss in the startup resistor is obtained as where v ac max is the maximum input voltage. the startup resistor should have proper rated dissipation wattage. 2. synchronization : FSCQ1565RP employs quasi-resonant switching technique to minimize the switching noise and loss. in this technique, a capacitor (cr) is added between the mosfet drain and source as shown in figure 6. the basic waveforms of quasi-resonant converter are shown in figure 7. the external capacitor lowers the rising slop of drain voltage to reduce the emi caused when the mosfet turns off. in order to minimize the mosfet switching loss, the mosfet should be turned on when the drain voltage reaches its minimum value as shown in figure 7. figure 3. synchronization circuit FSCQ1565RP 1n4007 rstr vcc c a1 da i sup ac line (v ac min - v ac max ) c dc c a2 icc vcc vstop=9v 25ua 4ma vstart=15v vz power up power down i sup avg 2v ac min ? ----------------------------- - v start 2 -------------- ? ?? ?? ?? 1 r str ---------- ? = loss 1 r str --------- - v ac max () 2 v start 2 + 2 --------------------------------------------------- 22v start v ac max ?? ----------------------------------------------------- - ? ?? ?? ?? ? = v cc c a1 d a c dc c a2 gnd cr drain ids r cc r sy1 r sy2 sync + v dc - lm vo c sy + v ds - v co d sy np ns na
FSCQ1565RP 14 figure 4. quasi-resonant operation waveforms the minimum drain voltage is indirectly detected by monitoring the vcc winding voltage as shown in figure 6 and 8. the voltage divider r sy1 and r sy2 should be chosen so that the peak voltage of sync signal (v sypk ) is lower than the ovp voltage (12v) in order to avoid triggering ovp in normal operation. it is typical to set v sypk to be lower than ovp voltage by 3-4 v. in order to detect the optimum time to turn on mosfet, the sync capacitor (c sy ) should be determined so that t r is the same with t q as shown in figure 8 . the t r and t q are given as, respectively where l m is the primary side inductance of the transformer, n s and n a are the number of turns for the output winding and vcc winding, respectively, v fo and v fa are the diode forward voltage drops of the output winding and vcc winding, respectively, and c eo is the sum of the output capacitance of mosfet and external capacitor cr. figure 5. normal quasi-resonant operation waveforms figure 6. extended quasi-resonant operation in general, quasi-resonant converter has a limitation in a wide load range application, since the switching frequency increases as the output load decreases, resulting in a severe switching loss in the light load condition. in order to get over this limitation, FSCQ1565RP employs extended quasi- resonant switching operation. figure 9 shows the mode change between normal quasi-resonant operation and extended quasi-resonant operation. in the normal quasi- resonant operation, the FSCQ1565RP enters into the extended quasi-resonant operation when the switching frequency exceeds 90khz as the load reduces. then, the mosfet is turned on, when the drain voltage reaches the second minimum level as shown in figure 10, which reduces the switching frequency. v dc v ro v ro i pk i ds v ds v gs mosfet off mosfet on t r r sy2 c sy v co 2.6 --------- r sy2 r sy1 r sy2 + ---------------------------------- - ? ?? ?? ln ?? = t q l m c eo ? ? = v co n a v o v fo + () ? n s ----------------------------------------- v fa ? = vsync vds mos fet gate 2v ro vrh (4.6v) vrf (2.6v) on t q t r on v sypk output power s witc hing frequency normal qr operation extended qr operation 90khz 45khz
FSCQ1565RP 15 once FSCQ1565RP enters into extended quasi-resonant operation, the first sync signal is ignored. after the first sync signal is applied, the sync threshold levels are changed from 4.6v and 2.6v to 3v and 1.8v, respectively, and the mosfet turn-on time is synchronized to the second sync signal. the FSCQ1565RP goes back to its normal quasi- resonant operation when the switching frequency reaches 45khz as the load increases. figure 7. extended quasi-resonant operation waveforms 3. feedback control : FSCQ1565RP employs current mode control, as shown in figure 11. an opto-coupler (such as the h11a817a) and shunt regulator (such as the ka431) are typically used to implement the feedback network. comparing the feedback voltage with the voltage across the rsense resistor plus an offset voltage makes it possible to control the switching duty cycle. when the reference pin voltage of the ka431 exceeds the internal reference voltage of 2.5v, the h11a817a led current increases, thus pulling down the feedback voltage and reducing the duty cycle. this event typically happens when the input voltage is increased or the output load is decreased. 3.1 pulse-by-pulse current limit : because current mode control is employed, the peak current through the sense fet is limited by the inverting input of pwm comparator (vfb*) as shown in figure 11. the feedback current (i fb ) and internal resistors are designed so that the maximum cathode voltage of diode d 2 is about 2.8v, which occurs when all i fb flows through the internal resistors. since d 1 is blocked when the feedback voltage (vfb) exceeds 2.8v, the maximum voltage of the cathode of d2 is clamped at this voltage, thus clamping vfb*. therefore, the peak value of the current through the sense fet is limited. 3.2 leading edge blanking (leb) : at the instant the internal sense fet is turned on, there usually exists a high current spike through the sense fet, caused by external resonant capacitor across the mosfet and secondary-side rectifier reverse recovery. excessive voltage across the r sense resistor would lead to incorrect feedback operation in the current mode pwm control. to counter this effect, the FSCQ1565RP employs a leading edge blanking (leb) circuit. this circuit inhibits the pwm comparator for a short time (t leb ) after the sense fet is turned on. figure 8. pulse width modulation (pwm) circuit 4. protection circuit : the FSCQ1565RP has several self protective functions such as over load protection (olp), abnormal over current protection (aocp), over voltage protection (ovp) and thermal shutdown (tsd). olp and ovp are auto-restart mode protection, while tsd and aocp are latch mode protection. because these protection circuits are fully integrated into the ic without external components, the reliability can be improved without increasing cost. -auto-restart mode protection : once the fault condition is detected, switching is terminated and the sense fet remains off. this causes vcc to fall. when vcc falls down to the under voltage lockout (uvlo) stop voltage of 9v, the protection is reset and FSCQ1565RP consumes only startup current (25ua). then, vcc capacitor is charged up, since the current supplied through the startup resistor is larger than the current that fps consumes. when vcc reaches the start voltage of 15v, FSCQ1565RP resumes its normal operation. if the fault condition is not removed, the sensefet remains off and vcc drops to stop voltage again. in this manner, the auto-restart can alternately enable and disable the switching of the power sense fet until the fault condition is eliminated (see figure 12). -latch mode protection : once protection triggers, switching is terminated and the sense fet remains off until the ac power line is un-plugged. then, vcc continues charging and discharging between 9v and 15v. the latch is reset only when vcc is discharged to 6v by un-plugging the ac power line. vs ync vds mos fet gate 2v ro 4.6v 2.6v 3v 1.8v on on 4 osc vcc vref i delay i fb v sd r 2.5r gate driver olp d1 d2 + v fb * - vfb ka431 c b vo h11a817a r sense sensefet
FSCQ1565RP 16 figure 9. auto restart mode protection 4.1 over load protection (olp) : overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. in this situation, the protection circuit should trigger in order to protect the smps. however, even when the smps is in the normal operation, the over load protection circuit can be triggered during the load transition. in order to avoid this undesired operation, the over load protection circuit is designed to trigger after a specified time to determine whether it is a transient situation or an overload situation. because of the pulse-by-pulse current limit capability, the maximum peak current through the sense fet is limited, and therefore the maximum input power is restricted with a given input voltage. if the output consumes more than this maximum power, the output voltage (vo) decreases below the set voltage. this reduces the current through the opto-coupler led, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (vfb). if vfb exceeds 2.8v, d1 is blocked and the 5ua current source starts to charge c b slowly up to vcc. in this condition, vfb continues increasing until it reaches 7.5v, when the switching operation is terminated as shown in figure 13. the delay time for shutdown is the time required to charge c b from 2.8v to 7.5v with 5ua. in general, a 20 ~ 50 ms delay time is typical for most applications. this protection is implemented in auto restart mode. figure 10. over load protection 4.2 abnormal over current protection (aocp) : when the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the sensefet during the leb time. even though the FSCQ1565RP has olp (over load protection), it is not enough to protect the FSCQ1565RP in that abnormal case, since sever current stress will be imposed on the sensefet until olp triggers. the FSCQ1565RP has an internal aocp (abnormal over current protection) circuit as shown in figure 14. when the gate turn-on signal is applied to the power sense fet, the aocp block is enabled and monitors the current through the sensing resistor. the voltage across the resistor is then compared with a preset aocp level. if the sensing resistor voltage is greater than the aocp level, the set signal is applied to the latch, resulting in the shutdown of smps. this protection is implemented in latch mode. figure 11. aocp block 4.3 over voltage protection (ovp) : if the secondary side feedback circuit were to malfunction or a solder defect caused an open in the feedback path, the current through the opto-coupler transistor becomes almost zero. then, vfb climbs up in a similar manner to the over load situation, fault situation 9v 15v vcc vds i op 4ma 25ua t t t t fault occurs fault removed normal operation normal operation power on v fb t 2.8v 7.5v over load protection t 12 = c b *(7.5-2.8)/i delay t 1 t 2 2 s q q r osc r 2.5r gnd gate driver leb pwm + - vaocp aocp r sense
FSCQ1565RP 17 forcing the preset maximum current to be supplied to the smps until the over load protection triggers. because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the over load protection triggers, resulting in the breakdown of the devices in the secondary side. in order to prevent this situation, an over voltage protection (ovp) circuit is employed. in general, the peak voltage of the sync signal is proportional to the output voltage and the FSCQ1565RP uses sync signal instead of directly monitoring the output voltage. if sync signal exceeds 12v, an ovp is triggered resulting in a shutdown of smps. in order to avoid undesired triggering of ovp during normal operation, the peak voltage of sync signal should be designed to be below 12v. this protection is implemented in auto restart mode. 4.4 thermal shutdown (tsd) : the sensefet and the control ic are built in one package. this makes it easy for the control ic to detect the abnormal over temperature of the sensefet. when the temperature exceeds approximately 150 c, the thermal shutdown triggers. this protection is implemented in latch mode. 5. soft start : the FSCQ1565RP has an internal soft start circuit that increases pwm comparator inverting input voltage together with the sensefet current slowly after it starts up. the typical soft start time is 20msec. the pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. it also helps to prevent transformer saturation and reduce the stress on the secondary diode during startup. for a fast build up of the output voltage, an offset is introduced in the soft-start reference current. 6. burst operation : in order to minimize the power consumption in the standby mode, FSCQ1565RP employs burst operation. once FSCQ1565RP enters into burt mode, FSCQ1565RP allows all output voltages and effective switching frequency to be reduced. figure 15 shows the typical feedback circuit for c-tv applications. in normal operation, the picture on signal is applied and the transistor q 1 is turned on, which de-couples r 3 , d z and d1 from the feedback network. therefore, only v o1 is regulated by the feedback circuit in normal operation and determined by r 1 and r 2 as in standby mode, the picture on signal is disabled and the transistor q 1 is turned off, which couples r 3 , dz and d 1 to the reference pin of ka431. then, vo2 is determined by the zener diode breakdown voltage. assuming that the forward voltage drop of d 1 is 0.7v, v o2 in standby mode is approxi- mately given by figure 12. typical feedback circuit to drop output voltage in standby mode figure 16 shows the burst mode operation waveforms. when the picture on signal is disabled, q 1 is turned off and r 3 and dz are connected to the reference pin of ka431 through d 1 . before v o2 drops to v o2 stby , the voltage on the reference pin of ka431 is higher than 2.5v, which increases the current through the opto led. this pulls down the feedback voltage (v fb ) of FSCQ1565RP and forces FSCQ1565RP to stop switching. if the switching is disabled longer than 1.4ms, FSCQ1565RP enters into burst operation and the operating current is reduced from 4ma (i op ) to 0.35ma (i ob ). since there is no switching, v o2 decrease until it reaches v o2 stby . as v o2 reaches v o2 stby , the current through the opto led decreases allowing the feedback voltage to rise. when the feedback voltage reaches 0.4v, FSCQ1565RP resumes switching with a predetermined peak drain current of 0.9a. after burst switching for 1.4ms, FSCQ1565RP stops switching and checks the feedback voltage. if the feedback voltage is below 0.4v, FSCQ1565RP stops switching until the feedback voltage increases to 0.4v. if the feedback voltage is above 0.4v, FSCQ1565RP goes back to the normal operation. v o1 norm 2.5 r 1 r 2 + r 2 -------------------- - ?? ?? ? = v o2 stby v z 0.7 2.5 ++ = picture on micom linear regulator v o2 v o1 (b+) ka431 r 2 r 1 r 3 r bias r d r f c f d 1 q1 a c r dz
FSCQ1565RP 18 figure 13. waveforms of burst operation v o2 norm v fb iop vds 0.4v v o2 stby i op (4ma) picture on picture off i ob (0.35ma) picture on burst mode (a) (c) (b) 0.4v 0.9a 1.4ms (b) burst operation (c) mode change to normal operation v fb v ds i ds 0.3v 0.4v 1.4ms (a) mode change to burst operation 0.4v 0.9a 1.4ms
FSCQ1565RP 19 typical application circuit features ? high efficiency (>80% at 85vac input) ? wider load range through the extended quasi-resonant operation ? low standby mode power consumption (<1w) ? low component count ? enhanced system reliability through various protection functions ? internal soft-start (20ms) key design notes ? 24v output is designed to drop to around 7v in standby mode 1. schematic application output power input voltage output voltage (max current) c-tv 210w universal input (85-265vac) 8.5v (1a) 15v (1a) 126v (0.9a) 24v (2a) c103 10uf 50v 1 3 4 10 t1 eer4942 15v, 1a c204 1000uf 35v d205 egp20d 11 lf101 c101 330nf 275vac fuse 250v 5.0a c102 470uf 400v rt101 5d-11 bd101 d103 1n4937 r103 5.1 ? ? ? ? 0.25w 6 7 r104 1.5k ? ? ? ? 0.25w 24 5 1 3 gnd drain sync fb vcc d106 1n4148 ic101 FSCQ1565RP c106 47nf 50v r105 470 ? ? ? ? 0.25w c105 2.7nf 50v zd102 18v 1w c107 1nf 1kv bead101 d105 1n4937 c210 470pf 1kv 8.5v, 1a d204 egp20d c205 1000uf 35v 13 c209 470pf 1kv 12 140v, 0.9a d202 egp30j c201 220uf 160v 14 c207 470pf 1kv l202 bead 16 c202 100uf 160v 24v, 2a d203 egp30d c203 2200uf 35v 17 c208 470pf 1kv 18 opto101 817a r201 1k ? ? ? ? 0.25w c206 22nf 50v c301 3.3nf q201 ka431 lz r203 39k ? ? ? ? 0.25w r202 1k ? ? ? ? 0.25w r205 240k ? ? ? ? 0.25w r204 4.7k ? ? ? ? 0.25w vr201 30k ? ? ? ? d201 1n4148 q202 ksc945 r206 10k ? ? ? ? 0.25w r207 5.1k ? ? ? ? 0.25w sw201 15 r102 150k ? ? ? ? 0.25w r101 100k ? ? ? ? 0.25w r106 1k ? ? ? ? 1w c104 10uf 50v zd201 5.1v 0.5w r208 1k ? ? ? ? 0.25w
FSCQ1565RP 20 2. transformer schematic diagram 3.winding specification 4.electrical characteristics 5. core & bobbin core : eer 4942 bobbin : eer4942(18pin) ae : 231 mm 2 no pin (s f) wire turns winding method n 24 18 - 17 0.65 2 7 space winding n p1 1 - 3 0.08 20 2 18 center winding n 140v/2 16 - 15 0.08 20 2 20 center winding n p2 3 - 4 0.08 20 2 18 center winding n 140v/2 15 - 14 0.08 20 2 20 center winding n 8.5v 12 - 13 0.6 1 3 space winding n 15v 11 - 10 0.4 2 5 space winding n a 7 - 6 0.3 1 12 space winding pin specification remarks inductance 1 - 4 225uh 5% 1khz, 1v leakage inductance 1 - 4 10uh max 2 nd all short e e e ee e e er r r r4 4 4 42 2 2 24 4 4 45 5 5 5 n n n n 2 2 2 24 4 4 4v v v v n n n n a a a a 7 7 7 7 1 1 1 1 3 3 3 3 1 1 1 1 4 4 4 4 1 1 1 1 5 5 5 5 1 1 1 1 6 6 6 6 1 1 1 1 7 7 7 7 1 1 1 1 8 8 8 8 n n n n 1 1 1 1 2 2 2 25 5 5 5v v v v / / / /2 2 2 2 n n n n 8 8 8 8. . . .5 5 5 5v v v v n n n n 1 1 1 1 5 5 5 5v v v v n n n n p p p p 1 1 1 1 n n n n p p p p2 2 2 2 1 1 1 1 2 2 2 2 3 3 3 3 4 4 4 4 5 5 5 5 6 6 6 6 8 8 8 8 9 9 9 9 1 1 1 1 0 0 0 0 1 1 1 11 1 1 1 1 1 1 1 2 2 2 2 n n n n 1 1 1 1 2 2 2 25 5 5 5v v v v / / / /2 2 2 2 n n n n 8 8 8 8. . . .5 5 5 5v v v v n n n n 1 1 1 1 4 4 4 40 0 0 0v v v v/ / / /2 2 2 2 n n n n p p p p2 2 2 2 n n n n p p p p 1 1 1 1 n n n n 1 1 1 1 4 4 4 40 0 0 0v v v v/ / / /2 2 2 2 n n n n 2 2 2 24 4 4 4 n n n n 1 1 1 1 5 5 5 5v v v v n n n n a a a a eer4942 n 140v /2 n 140v /2
FSCQ1565RP 21 6.demo circuit part list part value note part value note fuse c210 470pf / 1kv ceramic capacitor fuse 250v / 5a c301 3.3nf / 1kv ac ceramic capacitor ntc inductor rt101 5d-11 bead101 bead resistor bead201 5uh 3a r101 100k ? 0.25 w diode r102 150k ? 0.25 w d101 1n4937 1a, 600v r103 5.1 ? 0.25 w d102 1n4937 1a, 600v r104 1.5k ? 0.25 w d103 1n4148 0.15a, 50v r105 470 ? 0.25 w d104 short r106 1k ? 1 w d105 open r107 open zd101 1n4746 18v, 1w r201 1k ? 0.25 w zd102 open r202 1k ? 0.25 w zd201 1n5231 5.1v, 0.5w r203 39k ? 0.25 w d201 1n4148 0.15a, 50v r204 4.7k ? 0.25 w , 1% d202 egp30j 3a, 600v r205 240k ? 0.25 w , 1% d203 egp30d 3a, 200v r206 10k ? 0.25 w d204 egp20d 2a, 200v r207 5.1k ? 0.25 w d205 egp20d 2a, 200v r208 1k ? 0.25 w vr201 30k ? bridge diode capacitor bd101 gsib660 6a, 600v c101 330n/275vac box capacitor line filter c102 470uf / 400v electrolytic lf101 14mh c103 10uf / 50v electrolytic transformer c104 10uf / 50v electrolytic t101 eer4942 c105 2.7nf / 50v film capacitor switch c106 47nf / 50v film capacitor sw201 on/off for mcu signal c107 1nf / 1kv film capacitor ic c108 open ic101 FSCQ1565RP to220f-5l c201 220uf / 200v electrolytic opt101 817a c202 100uf / 200v electrolytic q201 ka431lz to-92 c203 2200uf / 35v electrolytic q202 ksc945 c204 1000uf / 35v electrolytic c205 1000uf / 35v electrolytic c206 22nf / 50v film capacitor c207 470pf / 1kv ceramic capacitor c208 470pf / 1kv ceramic capacitor c209 470pf / 1kv ceramic capacitor
FSCQ1565RP 22 7. layout figure 14. layout considerations for FSCQ1565RP figure 15. layout considerations for FSCQ1565RP
FSCQ1565RP 23 package dimensions dimensions in millimeters notes: unless otherwise specified a) this package does not comply to any current packaging standard. b) all dimensions are in millimeters. c) dimensions are exclusive of burrs, mold flash, and tie bar extrusions. 15.70 15.30 24.70 24.30 2.54 4.50 0.90 0.70 max 1.00 max 2.00 36.50 35.50 23.20 22.80 1.70 1.30 0.80 0.50 3.48 2.88 3.55 3.15 10.20 9.80 4.70 4.30 12.00 11.00 1.50 4.30 3.70 2.80 2.20 2.55 2.15 3.65 3.05 3.06 2.46 9.70 9.30 6.05 5.65 5.30 4.70 2.10 1.70 (1.00) r0.90 r0.90 r0.90 (1.65) mkt-to3pfc05reva to-3pf-7l(forming)
FSCQ1565RP 1/11/05 0.0m 001 ? 2005 fairchild semiconductor corporation life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. ordering information sydtu : forming type product number package marking code bvdss r ds(on) max. FSCQ1565RPsydtu to-3pf-7l(forming) cq1565rp 650v 0.7 ?

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